Enabling / disabling ROMs | |
Enabling / disabling ROMs | This 4 functions enable / disable lower or upper ROMs. |
cpct_enableUpperROM | Enables Upper ROM [0xC000 - 0xFFFF] |
cpct_enableLowerROM | Enables Lower ROM [0x0000 - 0x3FFF] |
cpct_disableUpperROM | Disables upper ROM [0xC000 - 0xFFFF] |
cpct_disableLowerROM | Disables Lower ROM [0x0000 - 0x3FFF] |
Lower ROM | [ 0x0000 - 0x3FFF ] |
Upper ROM | [ 0xC000 - 0xFFFF ] |
This 4 functions enable / disable lower or upper ROMs.
void cpct_enableUpperROM ()
void cpct_enableLowerROM ()
void cpct_disableUpperROM ()
void cpct_enableUpperROM ()
call cpct_enableUpperROM_asm call cpct_enableLowerROM_asm call cpct_disableUpperROM_asm call cpct_enableUpperROM_asm
These 4 functions enable / disable lower or upper ROMs. By default, CPCtelera sets both ROMS as disabled at the first event of video mode change. Enabling one of them means changing the way the CPU gets information from memory: on the places where ROM is enabled, CPU gets values from ROM whenever it tries to read from memory.
If ROM is disabled, these memory reads get values from RAM. ROMs are mapped in this address space:
CPU Requests to write to memory are always mapped to RAM, so there is no need to worry about that. Also, Gate Array always gets video memory values from RAM (it never reads from ROM), so enabling Upper ROM does not have any impact on the screen.
AF, BC, HL
33 bytes
Case | microSecs(us) | CPU Cycles ----------------------------------- Best | 23 | 92 ----------------------------------- Worst | 26 | 104 -----------------------------------