Waits until CRTC produces vertical synchronization signal (VSYNC) and returns.
void cpct_waitVSYNC ()
call cpct_waitVSYNC_asm
This function implements a wait loop that exists only when VSYNC signal from the CRTC is detected. This signal means that the monitor has finished drawing the last frame and it is returning to the top left of the screen to start drawing the next one. This is useful to synchronize routines with the 50Hz drawing display.
To detect VSYNC signal status, function reads bytes from PPI Port B. Every byte read the port has this information:
BIT NAME DESCRIPTION
----------------------------------------------------------------
7 CAS.IN Cassette data input
6 RN.BUSY Parallel/Printer port signal, "0"=ready,"1"= Not Ready
5 /EXP Expansion Port /EXP pin
4 LK4 Screen Refresh Rate ("1"=50Hz, "0"=60Hz)
3 LK3 3bit Distributor ID. Usually set to 4=Awa,
2 LK2 5=Schneider, or 7=Amstrad, see LK-selectable
1 LK1 Brand Names for details.
0 CRTC Vertical Sync ("1"=VSYNC active, "0"=inactive)So, checking the bit 0 of a byte comming from PPI Port B tells us if VSYNC is active or not. This function is optimized for size (instead of space) as it is a wait loop and does not make sense making it faster. It will stop when VSYNC is detected no matter how fast the loop is.
AF, BC
8 bytes
Case | microSecs (us) | CPU Cycles ---------------------------------------- Best | 12 | 48 ---------------------------------------- Any | 6 + 7*L | 24 + 28*L ----------------------------------------
L=Number of times loop is executed
As this is an active wait loop, it does not actually mind at all the time needed to process. It will vary depending on how much time has passed since the last VSYNC.